The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 2020

Filed:

Aug. 24, 2018
Applicants:

Boe Technology Group Co., Ltd., Beijing, CN;

Chongqing Boe Optoelectronics Technology Co., Ltd., Chongqing, CN;

Inventors:

Zhuo Xu, Beijing, CN;

Yajie Bai, Beijing, CN;

HeeCheol Kim, Beijing, CN;

Hailong Wu, Beijing, CN;

Yi Dan, Beijing, CN;

Jianbo Fu, Beijing, CN;

Yuqing Zhang, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1362 (2006.01); G02F 1/1368 (2006.01); G02F 1/1343 (2006.01); H01L 27/12 (2006.01); H01L 49/02 (2006.01); H01L 29/786 (2006.01); G09G 3/36 (2006.01);
U.S. Cl.
CPC ...
G02F 1/13624 (2013.01); G02F 1/1368 (2013.01); G02F 1/134363 (2013.01); G02F 1/136209 (2013.01); G02F 1/136286 (2013.01); G09G 3/3648 (2013.01); H01L 27/124 (2013.01); H01L 27/1255 (2013.01); H01L 27/1288 (2013.01); H01L 28/40 (2013.01); H01L 29/78633 (2013.01); H01L 29/78648 (2013.01); G02F 2001/13685 (2013.01); G02F 2001/136295 (2013.01); G02F 2201/121 (2013.01); G02F 2201/123 (2013.01); G09G 2300/0413 (2013.01); G09G 2300/0809 (2013.01); G09G 2310/021 (2013.01); G09G 2320/0257 (2013.01); G09G 2330/021 (2013.01);
Abstract

The embodiment of the present disclosure discloses an array substrate. The array substrate comprises: a base, a plurality of first scanning lines, a plurality of second scanning lines, a plurality of data lines, a common electrode line, and a plurality of pixel units. Each of the pixel units comprises: a first electrode, a second electrode, a switch transistor, a shared transistor and a shared capacitor. The switch transistor has a first terminal coupled to the second electrode, a second terminal coupled to one of the plurality of data lines, a bottom gate coupled to one of the plurality of first scanning lines, and a top gate coupled to one of the plurality of second scanning lines, and is configured to transfer a data signal of the data line to the second electrode under the control of a first scanning signal and a second scanning signal.


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