The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 2020

Filed:

Jun. 15, 2018
Applicants:

Inventec (Pudong) Technology Corporation, Shanghai, CN;

Inventec Corporation, Taipei, TW;

Inventor:

Ping Song, Shanghai, CN;

Assignees:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); G01R 31/317 (2006.01); G01R 31/3177 (2006.01); G01R 31/04 (2006.01); G01R 31/3185 (2006.01);
U.S. Cl.
CPC ...
G01R 31/3172 (2013.01); G01R 31/043 (2013.01); G01R 31/3177 (2013.01); G01R 31/31721 (2013.01); G01R 31/31855 (2013.01);
Abstract

A pin connection testing system for connector, and a method thereof are disclosed. In the pin connection testing system, a JTAG instruction is used to control a PLD, to drive the demultiplexer to transmit each to-be-tested signal, which is from the connector, to a first line or a second line; and, when the to-be-tested signal is transmitted to the first line, the to-be-tested signal is converted from analog to digital and encoded, and then transmitted to I/O pins of the PLD for reading; and, when the JTAG command is transmitted to the second line, the PLD reads the statuses of the I/O pins electrically connected to the second line; and then the PLD generates a test result according to the to-be-tested signals and the read I/O pins. Therefore, the technical effect of improving convenience in testing the connection status of the connector can be achieved.


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