Fet based humidity sensor with barrier layer protecting gate dielectric

Abstract

An illustrative humidity sensor may include a substrate having a source and a drain, wherein the drain is laterally spaced from the source. A gate stack is provided in the space between the source and the drain to form a transistor. The gate stack may include a gate insulator situated on the substrate to form a gate insulator/substrate interface. The gate stack may further include a barrier layer above the gate insulator. The barrier layer may be configured to act as a barrier to mobile charge, humidity and/or other contaminates, and may help prevent such contaminates from reaching the gate insulator/substrate interface. The gate stack may further include a humidity sensing layer above the barrier layer. The humidity sensing layer, when exposed to humidity, may modulate the conduction channel in the substrate under the gate insulator and between the source and the drain. In some cases, the humidity level may be determined by monitoring the current flowing between the source and drain.