The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 03, 2020
Filed:
Aug. 23, 2019
Cirrus Logic International Semiconductor Ltd., Edinburgh, GB;
Hynek Saman, Edinburgh, GB;
James Thomas Deas, Edinburgh, GB;
Cirrus Logic, Inc., Austin, TX (US);
Abstract
This applications relates to methods and apparatus for amplifying signals from capacitive transducers, in particular MEMS transducers such as MEMS capacitive microphones. An amplifier circuit has a signal node for receiving the input signal, a transducer biasing node for outputting a transducer bias voltage for biasing the capacitive transducer, and a voltage buffer configured to generate a buffered bias voltage at a buffer node. An amplifier arrangement is configured to receive the input signal from the signal node and the buffered bias voltage. The amplifier circuit comprises a signal path for supplying the buffered bias voltage to the transducer biasing node via a first capacitance, and the amplifier arrangement comprises a feedback resistor network configured such that: a change in input signal with respect to the buffered bias voltage results in a change in the output signal with respect to the buffered bias voltage with a gain greater than one; and a change in the buffered bias voltage results in a change in the output signal with a gain equal to one.