The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 03, 2020

Filed:

Jan. 16, 2019
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Brendan Farley, Donabate, IE;

Bob W. Verbruggen, Dublin, IE;

Christophe Erdmann, Dublin, IE;

Roberto Pelliconi, Imola, IT;

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/66 (2006.01); H03G 3/30 (2006.01); H03F 3/45 (2006.01);
U.S. Cl.
CPC ...
H03M 1/66 (2013.01); H03F 3/45183 (2013.01); H03G 3/3042 (2013.01);
Abstract

Apparatus and associated methods relating to a digital-to-analog converter (DAC) include a programmable resistance network coupled between a voltage supply node Vand a switch cell circuit to provide a predetermined resistance in response to the Vand current Iof the switch cell circuit. In an illustrative example, the DAC may include a switch cell circuit comprising one or more switch cells connected in parallel. Each switch cell may include a differential gain circuit having a first branch coupled to a second branch at an input of a current source. The programmable resistance may include a variable resistance configured to adjust a voltage (Vbias) supplied to the switch cell circuit in response to a control signal. By introducing the programmable resistance network, predetermined bias and/or gain values may be dynamically adjusted with a constant board-level power supply V.


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