The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 03, 2020

Filed:

Oct. 29, 2018
Applicant:

Microchip Technology Incorporated, Chandler, AZ (US);

Inventors:

Anders Vinje, Trondheim, NO;

Ivar Løkken, Trondheim, NO;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/06 (2006.01); H03M 1/10 (2006.01); H03M 1/46 (2006.01);
U.S. Cl.
CPC ...
H03M 1/0607 (2013.01); H03M 1/1023 (2013.01); H03M 1/468 (2013.01);
Abstract

Offset correction in a differential successive approximation register (SAR) analog-to-digital converter (ADC) is accomplished with a capacitor-reduced digital-to-analog converter (DAC) topology to enable offset correction without the need for a dedicated compensation DAC. This eliminates addition analog circuitry and die area. To perform the offset correction, the differential SAR ADC couples together inputs thereof to create an offset voltage, converts the offset voltage into a digital representation thereof, stores the digital representation of the offset voltage in an offset register, and corrects for the offset voltage by generating an offset compensation voltage with the capacitor-reduced array DAC controlled by the digital representation stored in the offset register. The digital representation controls scaling of reference voltages to the reduced capacitor array DAC associated with a least-significant-bit (LSB) of the differential SAR ADC.


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