The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 03, 2020

Filed:

May. 31, 2018
Applicant:

General Electric Company, Schenectady, NY (US);

Inventors:

Di Zhang, Niskayuna, NY (US);

Jiangbiao He, Niskayuna, NY (US);

Sachin Madhusoodhanan, San Jose, CA (US);

Assignee:

General Electric Company, Schenectady, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02M 7/487 (2007.01); H02M 1/34 (2007.01); H02M 7/5395 (2006.01); H02M 1/00 (2006.01); H01L 29/16 (2006.01);
U.S. Cl.
CPC ...
H02M 7/487 (2013.01); H02M 1/34 (2013.01); H02M 7/5395 (2013.01); H01L 29/16 (2013.01); H01L 29/1608 (2013.01); H02M 2001/0054 (2013.01); H02M 2001/346 (2013.01);
Abstract

A system includes a voltage converter and a controller for controlling the operation of the voltage converter. The voltage converter includes a plurality of legs, wherein each leg includes a first and a second set of silicon (Si)-based power devices. The first set of Si-based power devices includes a first and second Si-based power devices connected to each other at a first interconnection node and the second set of Si-based power devices includes a third and fourth Si-based power devices connected to each other at a second interconnection node. The first and second set of Si-based power devices are coupled across a first and second DC voltage sources respectively. A first set of Silicon-Carbide (SiC) based power devices is coupled across the first and second interconnection nodes. The system also includes a snubber capacitor connected across the first and the second interconnection nodes.


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