logo

For the Inventor, By the Inventor

The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10580688 B1

PDFFull Text
Date of Patent:
Mar. 03, 2020

Filed:

Jul. 17, 2018

Method of manufacturing semiconductor device

Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventors:

Hyun-Chul Yoon, Seongnam-si, KR;

Yeong-Shin Park, Seoul, KR;

Joonghee Kim, Anyang-si, KR;

Jihee Kim, Yongin-si, KR;

Dongjun Shin, Suwon-si, KR;

Kukhan Yoon, Hwasung-si, KR;

Taeseop Choi, Hwaseong-si, KR;

Jungheun Hwang, Daejeon, KR;

Assignee:

Samsung Electronics Co., Ltd., Gyeonggi-do, KR;

Attorney:

Harness, Dickey & Pierce, P.L.C.

Primary Examiner:

Bradley Smith

Int. Cl.
CPC ...
H01L 21/033 (2006.01); H01L 21/768 (2006.01); H01L 21/311 (2006.01); H01L 21/027 (2006.01); H01L 29/66 (2006.01); H01L 27/108 (2006.01); H01L 27/22 (2006.01); H01L 27/24 (2006.01); H01L 45/00 (2006.01); H01L 43/12 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76802 (2013.01); H01L 21/0274 (2013.01); H01L 21/0332 (2013.01); H01L 21/0337 (2013.01); H01L 21/0338 (2013.01); H01L 21/31116 (2013.01); H01L 21/31138 (2013.01); H01L 21/31144 (2013.01); H01L 21/76877 (2013.01); H01L 21/76895 (2013.01); H01L 27/10823 (2013.01); H01L 27/10852 (2013.01); H01L 27/10855 (2013.01); H01L 27/10876 (2013.01); H01L 27/10897 (2013.01); H01L 27/22 (2013.01); H01L 27/24 (2013.01); H01L 29/66477 (2013.01); H01L 27/1085 (2013.01); H01L 43/12 (2013.01); H01L 45/06 (2013.01); H01L 45/08 (2013.01); H01L 45/16 (2013.01);
Abstract

Disclosed is a method of fabricating a semiconductor device. The method comprises stacking an etching target layer, a first mask layer, an under layer, and a photoresist layer on a substrate, irradiating extreme ultraviolet (EUV) radiation on the photoresist layer to form a photoresist pattern, and performing a nitrogen plasma treatment on the photoresist pattern while using the first mask layer as an etching stop layer, the performing continuing until a top surface of the first mask layer is exposed. During the performing, the under layer is etched to form an under pattern below the photoresist pattern.

Find Patent Forward Citations

Loading…