The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 03, 2020

Filed:

Jun. 05, 2018
Applicant:

Honeywell International Inc., Morris Plains, NJ (US);

Inventor:

Aad van Wensen, Tilburg, NL;

Assignee:

Honeywell International Inc., Morris Plains, NJ (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/364 (2006.01); G06F 13/40 (2006.01); G06F 11/20 (2006.01); G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
G06F 13/364 (2013.01); G06F 11/2023 (2013.01); G06F 13/4022 (2013.01); G06F 13/4063 (2013.01); G06F 13/4282 (2013.01); G06F 2201/805 (2013.01);
Abstract

A fault-tolerant process control system includes a first and second master process controller, each including a first and second serial communication engine. A first bus switch couples the first serial communication engine to a shared SPI bus and a second bus switch couples the second communication engine to shared SPI bus. The shared SPI bus transmits SPI signals received from the first serial communication engine when the first bus switch is enabled to a first target device, and transmits SPI signals received from the second serial communication engine when the second bus switch is enabled to a second target device. An arbiter block receives a select control signal from the master process controllers and is coupled to both the first and second bus switch for single bus switch selection so that only one master process controller is granted access to the shared SPI bus.


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