The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 03, 2020
Filed:
Jul. 21, 2015
Capital Microelectronics Co., Ltd., Beijing, CN;
Xian Yang, Beijing, CN;
Qinghua Xue, Beijing, CN;
Capital Microelectronics Co., Ltd., Beijing, CN;
Abstract
A circuit and method of power on initialization for a configuration memory of an FPGA. The circuit includes: a decoding circuit, a driving circuit, and a configuration memory, where when 0 is written for the 1time, the decoding circuit turns on a word line corresponding to an address in the configuration memory, and the driving circuit writes content of the word line into 0; and when 0 is written for the itime, the decoding circuit turns on at least one word line corresponding to at least one address in the configuration memory, and the driving circuit writes content of each word line in the at least one word line into 0, the number of the at least one address being less than or equal to a sum of addresses that have completed writing of 0 for the previous (i−1)time.