The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 03, 2020

Filed:

Feb. 27, 2017
Applicant:

Qorvo Us, Inc., Greensboro, NC (US);

Inventors:

Christopher Truong Ngo, Queen Creek, AZ (US);

Alexander Wayne Hietala, Phoenix, AZ (US);

Praveen Varma Nadimpalli, Chandler, AZ (US);

Assignee:

Qorvo US, Inc., Greensboro, NC (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/3287 (2019.01); G06F 13/364 (2006.01); H02M 3/07 (2006.01); G06F 13/42 (2006.01); G06F 13/40 (2006.01);
U.S. Cl.
CPC ...
G06F 1/3287 (2013.01); G06F 13/364 (2013.01); G06F 13/404 (2013.01); G06F 13/4282 (2013.01);
Abstract

This disclosure relates generally to digital bus interfaces. In one embodiment, a bus interface system includes a master bus controller and a slave bus controller coupled along a bus line. The master bus controller is configured to generate an input data signal that is received by the slave bus controller along the bus line. The slave bus controller includes power conversion circuitry that includes a power converter configured to convert the input data signal from the master bus controller into a supply voltage. The power conversion circuitry is also configured to generate a charge current from the input data signal. In this manner, the charge current can be used to regulate the supply voltage and maintain the appropriate charge.


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