The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 03, 2020

Filed:

Dec. 22, 2017
Applicant:

Samsung Display Co., Ltd., Yongin-si, Gyeonggi-do, KR;

Inventors:

Chan Wook Shim, Asan-si, KR;

Jung Hwan Hwang, Cheonan-si, KR;

Jae-Jin Song, Hwaseong-si, KR;

Kook Hyun Choi, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01); G02F 1/1362 (2006.01); G09G 3/3258 (2016.01); G02F 1/1343 (2006.01); G09G 3/3266 (2016.01);
U.S. Cl.
CPC ...
G02F 1/136286 (2013.01); G02F 1/1343 (2013.01); G09G 3/3258 (2013.01); G09G 3/3266 (2013.01); G09G 3/3677 (2013.01); G02F 1/1362 (2013.01); G09G 2300/0426 (2013.01); G09G 2310/0264 (2013.01); G09G 2310/0267 (2013.01); G09G 2310/0281 (2013.01); G09G 2310/0286 (2013.01);
Abstract

A display device includes: a display panel in which a plurality of pixels are arranged; a plurality of gate lines disposed in the display panel and transmitting a gate signal to the plurality of pixels; a gate driver disposed in the display panel and including a plurality of stages for generating the gate signal and outputting the gate signal to the plurality of gate lines; and a plurality of clock signal lines disposed in the display panel and transmitting a clock signal to the plurality of stages. Each stage of the plurality of stages includes a clock signal terminal connected to one of the plurality of clock signal lines to receive the clock signal, a first output terminal connected to a corresponding gate line to output the gate signal, and a first transistor and a second transistor connected to the first output terminal. The stages have a substantially same area, and a size of the second transistor of a first stage disposed at an upper portion of the display panel is different from a size of the second transistor of a second stage disposed at a lower portion of the display panel.


Find Patent Forward Citations

Loading…