The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 25, 2020

Filed:

Jun. 05, 2018
Applicants:

SK Hynix Inc., Icheon-si Gyeonggi-do, KR;

Seoul National University R&db Foundation, Seoul, KR;

Inventors:

Mino Kim, Seoul, KR;

Suhwan Kim, Seoul, KR;

Deog-Kyoon Jeong, Seoul, KR;

Assignees:

SK hynix Inc., Icheon-si, Gyeonggi-do, KR;

Seoul National University R&DB Foundation, Seoul, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/133 (2014.01); H03H 11/26 (2006.01);
U.S. Cl.
CPC ...
H03K 5/133 (2013.01); H03H 11/26 (2013.01);
Abstract

In an embodiment, a unit delay circuit comprises a first path configured to delay a first input signal to output a first output signal when a selection signal is inactivated, a second path configured delay a second input signal to output a second output signal when the selection signal is inactivated, and a third path configured to delay the first input signal to output the second output signal when the selection signal is activated.


Find Patent Forward Citations

Kim, Mino. (2020). Unit delay circuit and digitally controlled delay line including the same (U.S. Patent No. 10574219). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10574219

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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