The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 25, 2020

Filed:

Jul. 25, 2017
Applicant:

Semiconductor Components Industries, Llc, Phoenix, AZ (US);

Inventor:

WeiMing Sun, Beijing, CN;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02H 9/04 (2006.01); H02H 1/00 (2006.01); H02H 11/00 (2006.01); H01R 24/60 (2011.01); H01R 107/00 (2006.01);
U.S. Cl.
CPC ...
H02H 9/046 (2013.01); H02H 1/0007 (2013.01); H02H 9/04 (2013.01); H02H 9/044 (2013.01); H02H 11/002 (2013.01); H01R 24/60 (2013.01); H01R 2107/00 (2013.01);
Abstract

A circuit for power supply protection comprising a first n-channel Metal Oxide Semiconductor Field Effect Transistor (nMOSFET) and a first p-channel Metal Oxide Semiconductor Field Effect Transistor (pMOSFET) each having a drain terminal coupled to an input voltage, a second nMOSFET and a second pMOSFET having drain terminals coupled to an output voltage and sources coupled to a sources of the first and second nMOSFET, respectively, and a control circuit. The control circuit turns the nMOSFETs off and the pMOSFETs on when the input voltage has a voltage value greater than zero and less than a predetermined positive limit, operates the nMOSFETs in a saturation mode and turns the pMOSFETs off when the input voltage has a voltage value greater than the predetermined positive limit, and turn the nMOSFETs and pMOSFETs off when the input voltage has a voltage value less than zero.


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