The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 25, 2020

Filed:

Dec. 28, 2018
Applicant:

Kabushiki Kaisha Toshiba, Minato-ku, Tokyo, JP;

Inventors:

Tsuneo Ogura, Kanagawa, JP;

Tomoko Matsudai, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/105 (2006.01); H01L 29/739 (2006.01); H01L 29/10 (2006.01); H01L 29/417 (2006.01); H01L 29/08 (2006.01); H01L 29/36 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/40 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7397 (2013.01); H01L 29/0692 (2013.01); H01L 29/0696 (2013.01); H01L 29/083 (2013.01); H01L 29/0804 (2013.01); H01L 29/0821 (2013.01); H01L 29/1004 (2013.01); H01L 29/36 (2013.01); H01L 29/41708 (2013.01); H01L 29/4236 (2013.01); H01L 29/407 (2013.01);
Abstract

A semiconductor device includes a third electrode between a first semiconductor region and a second electrode, a fourth electrode between the first semiconductor region and the second electrode, a second semiconductor region between the first semiconductor region and the second electrode and between the third electrode and the fourth electrode, a third semiconductor region between the second semiconductor region and the second electrode, a fourth electrode between the first semiconductor region and the second electrode to be electrically connected to the second electrode, and a fifth semiconductor region between the first electrode and the first semiconductor region. A first insulating film is provided between the third electrode and the first semiconductor region, the second semiconductor region, the third semiconductor region and the second electrode. A second insulating film is provided between the fourth semiconductor region and the first semiconductor region, the second semiconductor region, and the fourth semiconductor region.


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