The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 2020

Filed:

Aug. 27, 2013
Applicant:

Idac Holdings, Inc., Wilmington, DE (US);

Inventors:

Robert A. DiFazio, Greenlawn, NY (US);

Philip J. Pietraski, Jericho, NY (US);

Rui Yang, Greenlawn, NY (US);

Erdem Bala, Farmingdale, NY (US);

Jialing Li, San Diego, CA (US);

Assignee:

IDAC Holdings, Inc., Wilmington, DE (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 7/14 (2006.01); H04L 5/14 (2006.01);
U.S. Cl.
CPC ...
H04L 5/14 (2013.01);
Abstract

Embodiments contemplate TDD systems and techniques where timeslots may be allocated as DL, UL, or FDSC; the base station (BS) may be full duplex singled channel (FDSC) capable; and some, all, or none of the UEs (or WTRUs) may be FDSC capable. In one or more embodiments, FDSC1 timeslots may be contemplated that may be used (in some embodiments perhaps exclusively used) by a pair of radios, for example one BS and one UE, both having FD capability. In one or more embodiments, FDSC timeslots may be shared among a BS with FDSC capability and two or more UEs, that may be half duplex (HD). Embodiments also contemplate various FDD systems and techniques, including full duplex FDD systems and techniques.


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