The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 2020

Filed:

May. 31, 2018
Applicant:

Mediatek Inc., Hsinchu, TW;

Inventors:

Mao-Ching Chiu, Chiayi County, TW;

Chong-You Lee, Taipei, TW;

Timothy Perrin Fisher-Jeffes, Cambridge, MA (US);

Cheng-Yi Hsu, Taipei, TW;

Yen-Shuo Chang, Hsinchu, TW;

Wei-Jen Chen, Taipei, TW;

Ju-Ya Chen, Kaohsiung, TW;

Assignee:

MEDIATEK INC., Hsinchu, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04L 1/00 (2006.01); H03M 13/11 (2006.01); H04B 7/0456 (2017.01); H03M 13/00 (2006.01);
U.S. Cl.
CPC ...
H04L 1/0058 (2013.01); H03M 13/114 (2013.01); H03M 13/116 (2013.01); H03M 13/1137 (2013.01); H03M 13/1188 (2013.01); H03M 13/6306 (2013.01); H03M 13/6393 (2013.01); H03M 13/6516 (2013.01); H04B 7/0456 (2013.01); H04L 1/0041 (2013.01); H04L 1/0057 (2013.01); H04L 1/0068 (2013.01);
Abstract

A processor of an apparatus selects a codebook from a plurality of codebooks embedded in a quasi-cyclic-low-density parity-check (QC-LDPC) code. The processor stores the selected codebook in a memory associated with the processor. The processor also encodes data using the selected codebook to generate a plurality of modulation symbols of the data. The processor further controls a transmitter of the apparatus to multiplex, convert, filter, amplify and radiate the modulation symbols as electromagnetic waves through one or more antennas of the apparatus. In selecting the codebook from the plurality of codebooks embedded in the QC-LDPC code, the processor selects the codebook according to one or more rules such that a small codebook requiring a shorter amount of processing latency for the encoding is selected for the encoding unless a larger codebook corresponding to a larger amount of processing latency for the encoding is necessary for the encoding.


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