The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 18, 2020
Filed:
Jun. 20, 2019
Semiconductor Components Industries, Llc, Phoenix, AZ (US);
Tom Heller, Karmiel, IL;
Jakob Vovnoboy, Yakir, IL;
SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Phoenix, AZ (US);
Abstract
An illustrative digital latch includes: a differential transistor pair ('track pair') capacitively coupled to a differential input signal to cause a differential output voltage between output nodes to track the differential input signal when a clock signal is asserted; a cross-coupled transistor pair ('latch pair') coupled to the output nodes to latch the differential output voltage when the clock signal is de-asserted; a differential transistor pair (“clock pair”) that steers a bias current between the track pair and the latch pair; and a matched set of bias transistors that determines the bias current for the clock pair and a reference voltage on a reference voltage node, the reference voltage node being coupled to a base of each transistor in the track pair by equal bias resistances.