The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 2020

Filed:

Aug. 26, 2016
Applicant:

Osram Opto Semiconductors Gmbh, Regensburg, DE;

Inventor:

Andreas Rudolph, Regensburg, DE;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 33/06 (2010.01); H01L 33/00 (2010.01); H01L 33/02 (2010.01); H01L 33/30 (2010.01); H01L 33/04 (2010.01); H01S 5/343 (2006.01);
U.S. Cl.
CPC ...
H01L 33/06 (2013.01); H01L 33/0062 (2013.01); H01L 33/025 (2013.01); H01L 33/305 (2013.01); H01L 33/04 (2013.01); H01L 33/30 (2013.01); H01S 5/34333 (2013.01);
Abstract

An optoelectronic semiconductor chip () is specified, comprising a p-type semiconductor region (), an n-type semiconductor region (), and an active layer arranged between the p-type semiconductor region () and the n-type semiconductor region (), said active layer being designed as a multiple quantum well structure (), wherein the multiple quantum well structure () comprises quantum well layers () and barrier layers (), wherein the barrier layers () are doped, and wherein undoped intermediate layers () are arranged between the quantum well layers () and the barrier layers (). Furthermore, a method for producing the optoelectronic semiconductor chip () is specified.


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