The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 18, 2020
Filed:
Feb. 05, 2019
Fuji Electric Co., Ltd., Kawasaki-shi, Kanagawa, JP;
Masaharu Yamaji, Matsumoto, JP;
FUJI ELECTRIC CO., LTD., Kawasaki-Shi, JP;
Abstract
Warping of a semiconductor wafer occurring due to a difference in the thermal expansion rates of an insulating film and the semiconductor wafer is restricted. Therefore, processing failures and conveying failures in the manufacturing process, as well as cracking of the semiconductor wafer, are restricted. Provided is a high breakdown voltage passive element including a substrate, a lower metal layer and upper metal layer stacked on the substrate, and an insulating unit formed between the lower metal layer and upper metal layer, wherein the insulating unit has a first insulating film whose thermal expansion rate is lower than the thermal expansion rate of the substrate, and a second insulating film, formed on the first insulating film, whose thermal expansion rate is higher than the thermal expansion rate of the substrate.