The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 2020

Filed:

May. 17, 2018
Applicant:

Renesas Electronics Corporation, Koutou-ku, Tokyo, JP;

Inventors:

Yotaro Goto, Ibaraki, JP;

Tatsuya Kunikiyo, Tokyo, JP;

Hidenori Sato, Ibaraki, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/062 (2012.01); H01L 27/146 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 27/14636 (2013.01); H01L 24/05 (2013.01); H01L 24/08 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 27/1463 (2013.01); H01L 27/1469 (2013.01); H01L 27/14634 (2013.01); H01L 27/14643 (2013.01); H01L 2224/0557 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/08146 (2013.01); H01L 2224/29188 (2013.01); H01L 2224/32145 (2013.01);
Abstract

In a solid state image sensor having two semiconductor substrates or more laminated longitudinally, electrical connection between the semiconductor substrates is made by a fine plug. An insulating film covering a first rear surface of a semiconductor substrate having a light receiving element, and an interlayer insulating film covering a second main surface of a semiconductor substrate mounting a semiconductor element are joined to each other. In its joint surface, a plug penetrating the insulating film and a lug embedded in a connection hole in an upper surface of the interlayer insulating film are joined, and the light receiving element and the semiconductor element are electrically connected through the plugs.


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