The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 18, 2020
Filed:
May. 18, 2018
Applicant:
SK Hynix Inc., Gyeonggi-do, KR;
Inventors:
Woo Sung Moon, Gyeonggi-do, KR;
Do Youn Kim, Gyeonggi-do, KR;
Assignee:
SK hynix Inc., Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 27/11582 (2017.01); H01L 21/311 (2006.01); H01L 27/11565 (2017.01); H01L 21/027 (2006.01); H01L 21/475 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11582 (2013.01); H01L 21/0274 (2013.01); H01L 21/31116 (2013.01); H01L 21/31144 (2013.01); H01L 21/475 (2013.01); H01L 21/76805 (2013.01); H01L 27/11565 (2013.01);
Abstract
A method of manufacturing a three-dimensional semiconductor device, the method comprising: forming a stack structure; patterning channel holes using light transmission holes of an exposure mask; forming cell plugs penetrating the stack structure; and patterning wave-type slits using light transmission holes of the exposure mask, wherein the step of patterning holes further includes sequentially stacking a first mask layer and a first photoresist layer on the stack structure, and exposing the first photoresist layer by light transmitted through the exposure mask.