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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10566258 B1

PDFFull Text
Date of Patent:
Feb. 18, 2020

Filed:

May. 03, 2018

Method of packaging power semiconductor module including power transistors

Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventors:

Kuniharu Muto, Tokyo, JP;

Koji Bando, Tokyo, JP;

Assignee:

RENESAS ELECTRONICS CORPORATION, Tokyo, JP;

Attorney:

Mattingly & Malur, PC

Primary Examiner:

Ermias T Woldegeorgis

Int. Cl.
CPC ...
H01L 23/31 (2006.01); H01L 23/495 (2006.01); H01L 25/16 (2006.01); H01L 25/00 (2006.01); H01L 21/48 (2006.01); H01L 23/40 (2006.01); H01L 23/00 (2006.01); H01L 25/07 (2006.01); H01L 23/36 (2006.01); H01L 25/18 (2006.01); H01L 21/56 (2006.01); H01L 23/29 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3135 (2013.01); H01L 21/481 (2013.01); H01L 21/4842 (2013.01); H01L 23/36 (2013.01); H01L 23/4006 (2013.01); H01L 23/4952 (2013.01); H01L 23/49537 (2013.01); H01L 23/49541 (2013.01); H01L 23/49562 (2013.01); H01L 23/49568 (2013.01); H01L 23/49575 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 25/072 (2013.01); H01L 25/162 (2013.01); H01L 25/165 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 21/565 (2013.01); H01L 23/296 (2013.01); H01L 23/3107 (2013.01); H01L 23/49582 (2013.01); H01L 24/45 (2013.01); H01L 2023/405 (2013.01); H01L 2023/4031 (2013.01); H01L 2023/4068 (2013.01); H01L 2023/4087 (2013.01); H01L 2224/0603 (2013.01); H01L 2224/45124 (2013.01); H01L 2224/45144 (2013.01); H01L 2224/48101 (2013.01); H01L 2224/48108 (2013.01); H01L 2224/48137 (2013.01); H01L 2224/48139 (2013.01); H01L 2224/48175 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/4903 (2013.01); H01L 2224/49112 (2013.01); H01L 2224/49171 (2013.01); H01L 2224/49505 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/92247 (2013.01); H01L 2924/1203 (2013.01); H01L 2924/13055 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/181 (2013.01);
Abstract

Reliability of a semiconductor module is improved. In a resin mold step of assembly of a semiconductor module, an IGBT chip, a diode chip, a control chip, a part of each of chip mounting portions are resin molded so that a back surface of each of the chip mounting portions is exposed from a back surface of a sealing body. After the resin molding, an insulating layer is bonded to the back surface of the sealing body so as to cover each back surface (exposed portion) of the chip mounting portions, and then, a TIM layer is bonded to an insulating layer. Here, a region of the TIM layer in a plan view is included in a region of the insulating layer.

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