The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 2020

Filed:

Jun. 29, 2017
Applicant:

Microsoft Technology Licensing, Llc, Redmond, WA (US);

Inventors:

Felix Schuster, Cambridge, GB;

Olga Ohrimenko, Cambridge, GB;

Istvan Haller, Cambridge, GB;

Manuel Silverio da Silva Costa, Cambridge, GB;

Daniel Gruss, Graz, AT;

Julian Lettner, Irvine, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/14 (2006.01); G06F 12/128 (2016.01); G06F 9/46 (2006.01); G06F 12/0806 (2016.01);
U.S. Cl.
CPC ...
G06F 12/14 (2013.01); G06F 9/467 (2013.01); G06F 12/0806 (2013.01); G06F 12/128 (2013.01); G06F 2212/1052 (2013.01); G06F 2212/621 (2013.01);
Abstract

In various examples a compute node is described. The compute node has a central processing unit which implements a hardware transactional memory using at least one cache of the central processing unit. The compute node has a memory in communication with the central processing unit, the memory storing information comprising at least one of: code and data. The compute node has a processor which loads at least part of the information, from the memory into the cache. The processor executes transactions using the hardware transactional memory and at least the loaded information, such that the processor ensures that the loaded information remains in the cache until completion of the execution.


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