The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 2020

Filed:

Nov. 03, 2017
Applicant:

Lite-on, Inc., Milpitas, CA (US);

Inventor:

Victor K. J. Lee, Milpitas, CA (US);

Assignee:

LITE-ON, INC., Milpitas, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/20 (2006.01); G06F 1/30 (2006.01);
U.S. Cl.
CPC ...
G06F 11/2015 (2013.01); G06F 1/30 (2013.01);
Abstract

A peak power control (PPC) system/method providing a uninterruptable power supply (UPS) to one or more protected load devices (PLD) supplied by power supply units (PSU) serviced by a primary power source (PPS) and a secondary power source (SPS) is disclosed. The PPS is configured to provide only a portion of peak power demand (PPD) required by the PSU to support the PLD power demand. During periods where power supplied by the PPS is insufficient to support the PLD power demand, the SPS augments the power supplied to the PSU to meet the PLD power demand. During periods where power supplied by the PPS is sufficient to meet the PLD power demand, the SPS is recharged by any excess power available from the PPS. Power provisioning controls (PPC) generate state control information (SCI) instructing the PLD to modulate computing clock speeds and/or prioritize PLD computing tasks in real-time.


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