The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 2020

Filed:

Aug. 01, 2017
Applicant:

Wave Computing, Inc., Campbell, CA (US);

Inventors:

Christopher John Nicol, Campbell, CA (US);

Derek William Meyer, Truckee, CA (US);

Assignee:

Wave Computing, Inc., Campbell, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 5/10 (2006.01); G06F 13/16 (2006.01); G06F 15/82 (2006.01); G11C 19/00 (2006.01); G06N 20/00 (2019.01); G06F 13/40 (2006.01);
U.S. Cl.
CPC ...
G06F 5/10 (2013.01); G06F 13/1663 (2013.01); G06F 13/1673 (2013.01); G06N 20/00 (2019.01); G11C 19/00 (2013.01); G06F 13/4022 (2013.01); G06F 15/82 (2013.01);
Abstract

A combination of memory units and dataflow processing units is disclosed for computation. A first memory unit is interposed between a first dataflow processing unit and a second dataflow processing unit. Operations for a dataflow graph are allocated across the first dataflow processing unit and the second dataflow processing unit. The first memory unit passes data between the first dataflow processing unit and the second dataflow processing unit to execute the dataflow graph. The first memory unit is a high bandwidth, shared memory device including a hybrid memory cube. The first dataflow processing unit and second dataflow processing unit include a plurality of circular buffers containing instructions for controlling data transfer between the first dataflow processing unit and second dataflow processing unit. Additional dataflow processing units and additional memory units are included for additional functionality and efficiency.


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