The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 2020

Filed:

May. 11, 2018
Applicant:

Scaleflux, Inc., San Jose, CA (US);

Inventors:

Qi Wu, San Jose, CA (US);

Duy Nguyen, Fremont, CA (US);

Prathamesh Amritkar, San Jose, CA (US);

Qing Li, San Jose, CA (US);

Assignee:

SCALEFLUX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0659 (2013.01); G06F 3/0613 (2013.01); G06F 3/0679 (2013.01); G06F 12/0246 (2013.01); G06F 12/0253 (2013.01); G06F 2212/1016 (2013.01); G06F 2212/7205 (2013.01);
Abstract

An infrastructure, method and controller card for managing flash memory in a storage infrastructure. A system is provided that includes flash memory; and a controller that includes: an I/O request handler for handling standard read and write (R/W) operations requested from a host; a garbage collection (GC) system that performs a GC process on the flash memory in response to a threshold condition, wherein the GC process includes GC-induced R/W operations; and a scheduler that interleaves standard R/W operations with GC-induced R/W operations, wherein the scheduler calculates minimum and maximum boundaries for GC-induced R/W operations for a GC process based on an estimated GC latency.


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