The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 18, 2020
Filed:
Aug. 10, 2016
Boe Technology Group Co., Ltd., Beijing, CN;
Ordos Yuansheng Optoelectronics Co., Ltd., Ordos, CN;
Chaochao Sun, Beijing, CN;
Huafeng Liu, Beijing, CN;
Shengwei Zhao, Beijing, CN;
Kai Zhang, Beijing, CN;
Lei Yang, Beijing, CN;
Lulu Ye, Beijing, CN;
Jingping Lv, Beijing, CN;
Chao Wang, Beijing, CN;
Chongliang Hu, Beijing, CN;
Meng Yang, Beijing, CN;
Duolong Ding, Beijing, CN;
Bule Shun, Beijing, CN;
Lin Xie, Beijing, CN;
Yao Li, Beijing, CN;
Shimin Sun, Beijing, CN;
BOE TECHNOLOGY GROUP CO., LTD., Beijing, CN;
ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., Beijing, CN;
Abstract
The present disclosure provides an array substrate, its driving method and manufacturing method, and a display device. The array substrate includes a transistor layer arranged on a base, and a first transparent conductive layer, a first insulation layer, a second transparent conductive layer, a second insulation layer and a third transparent conductive layer sequentially arranged on the transistor layer. The first transparent conductive layer covers the transistor layer at a display area, the second transparent conductive layer includes a pattern of touch electrodes, and the third transparent conductive layer includes a pattern of pixel electrodes. Within any pixel area of the display area, the pixel electrode is connected to a pixel electrode connection end of the transistor layer through a via-hole in the first insulation layer and the second insulation layer, and the first transparent conductive layer is provided with an opening at a position corresponding to the via-hole.