The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 11, 2020

Filed:

Apr. 19, 2018
Applicant:

Teledyne Scientific & Imaging, Llc, Thousand Oaks, CA (US);

Inventors:

Mihail Milkov, Moorpark, CA (US);

Vincent Douence, Thousand Oaks, CA (US);

Assignee:

Teledyne Scientific & Imaging, LLC, Thousand Oaks, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 5/355 (2011.01); H04N 5/363 (2011.01); H04N 5/378 (2011.01); H01L 27/146 (2006.01);
U.S. Cl.
CPC ...
H04N 5/35554 (2013.01); H04N 5/363 (2013.01); H04N 5/378 (2013.01); H01L 27/1464 (2013.01);
Abstract

A pixel comprising a pinned photodiode (PPD) which generates a photocurrent I, a transfer gate connected in series between the PPD and a first node, a low-gain select transistor connected between the first node and a second node, a reset transistor connected between the second node and a reset voltage, a capacitance connected between the second node and a first constant potential, and a source-follower transistor whose source, gate and drain are connected to an output node, the first node and a second constant potential, respectively. When properly arranged, a vertically integrated (3D) global-shutter pinned PPD pixel is provided, which uses an overflow integration capacitor and subthreshold conduction of the reset transistor for increased dynamic range. Global shutter operation is achieved by storing the pixel output on sampling capacitors in another semiconductor layer at the end of integration.


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