The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 11, 2020

Filed:

May. 04, 2018
Applicant:

Sandisk Technologies Llc, Plano, TX (US);

Inventors:

Yingda Dong, San Jose, CA (US);

Yangyin Chen, Leuven, BE;

James Kai, Santa Clara, CA (US);

Assignee:

SANDISK TECHNOLOGIES LLC, Addison, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 27/00 (2006.01); H01L 29/00 (2006.01); G11C 16/04 (2006.01); H01L 27/11582 (2017.01); H01L 27/11573 (2017.01); H01L 21/02 (2006.01); H01L 29/20 (2006.01); H01L 27/06 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11582 (2013.01); G11C 16/0483 (2013.01); H01L 21/0262 (2013.01); H01L 27/0605 (2013.01); H01L 27/11573 (2013.01); H01L 29/2003 (2013.01);
Abstract

A three-dimensional memory device includes alternating stacks of insulating strips and electrically conductive strips laterally spaced apart among one another by line trenches and a two-dimensional array of memory stack structures and a two-dimensional array of dielectric pillar structures located in the line trenches. Each line trench is filled with laterally alternating sequence of memory stack structures and dielectric pillar structures. Each memory stack structure contains a vertical semiconductor channel, a pair of blocking dielectrics contacting outer sidewalls of the vertical semiconductor channel, a pair of charge storage layers contacting outer sidewalls of the pair of blocking dielectrics, and a pair of tunneling dielectrics contacting outer sidewalls of the pair of charge storage layers.


Find Patent Forward Citations

Loading…