The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 11, 2020

Filed:

Sep. 10, 2018
Applicant:

Toshiba Memory Corporation, Minato-ku, JP;

Inventors:

Shinya Naito, Toyoda, JP;

Takayuki Kakegawa, Yokkaichi, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/06 (2006.01); G11C 16/26 (2006.01); H01L 27/11565 (2017.01); H01L 27/11582 (2017.01); H01L 27/1157 (2017.01); G11C 11/56 (2006.01); H01L 23/522 (2006.01); G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
G11C 16/26 (2013.01); H01L 27/1157 (2013.01); H01L 27/11565 (2013.01); H01L 27/11582 (2013.01); G11C 11/5671 (2013.01); G11C 16/0483 (2013.01); H01L 23/5226 (2013.01);
Abstract

According to one embodiment, there is provided a semiconductor device including a first semiconductor region, a stacked body, a semiconductor channel, a gate insulating film, and a control circuit. The stacked body is of conductive films arranged in a stacking direction with an insulator interposed. The semiconductor channel penetrates the stacked body in the stacking direction, and is electrically connected at one end to the first semiconductor region. The gate insulating film is arranged between the stacked body and the semiconductor channel. The control circuit supplies a first voltage to a closest conductive film of the stacked body to the first semiconductor region, and supplies a second voltage higher than the first voltage to the first semiconductor region, at a time of reading information from one of memory cells formed at positions where the conductive films intersect with the semiconductor channel.


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