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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10559344 B1

PDFFull Text
Date of Patent:
Feb. 11, 2020

Filed:

Sep. 14, 2017

Hybrid non-volatile memory devices with static random access memory (sram) array and non-volatile memory (nvm) array

Applicant:

Aspiring Sky Co. Limited, Hong Kong, CN;

Inventors:

Zhijiong Luo, Hopewell Township, PA (US);

Shu Wang, Shanghai, CN;

Xiaoming Jin, Shanghai, CN;

Assignee:

Aspiring Sky Co. Limited, Hong Kong, CN;

Attorney:

Hertzberg, Turk & Associates, LLC

Primary Examiner:

David Lam

Int. Cl.
CPC ...
G11C 14/00 (2006.01); G11C 11/408 (2006.01); G11C 8/10 (2006.01); G11C 5/02 (2006.01); G11C 7/12 (2006.01); G11C 7/18 (2006.01); G11C 8/08 (2006.01); G11C 11/419 (2006.01); G06F 12/02 (2006.01); G06F 12/06 (2006.01); G06F 13/16 (2006.01); G11C 11/418 (2006.01); G11C 16/08 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4085 (2013.01); G06F 12/0246 (2013.01); G06F 12/0638 (2013.01); G06F 13/1694 (2013.01); G11C 5/025 (2013.01); G11C 7/12 (2013.01); G11C 7/18 (2013.01); G11C 8/08 (2013.01); G11C 8/10 (2013.01); G11C 11/419 (2013.01); G11C 14/0063 (2013.01); G06F 2212/1016 (2013.01); G06F 2212/1028 (2013.01); G06F 2212/205 (2013.01); G06F 2212/7203 (2013.01); G11C 11/418 (2013.01); G11C 14/00 (2013.01); G11C 16/08 (2013.01); Y02D 10/13 (2018.01); Y02D 10/14 (2018.01);
Abstract

Technologies are generally described herein for a hybrid non-volatile memory structure that includes a number of SRAM buffers. SRAM access times may be achieved for non-volatile read/write operations by performing access queue buffered read/write operations first. The SRAM buffer may be shareable as a system SRAM. In other examples, a hybrid non-volatile memory according to some embodiments may include a high speed block and a high endurance block to store different types of data with different access needs. The hybrid non-volatile memory may also include a normal block to store the data which is non-frequently changed.

Find Patent Forward Citations

Luo, Zhijiong. (2020). Hybrid non-volatile memory devices with static random access memory (sram) array and non-volatile memory (nvm) array (U.S. Patent No. 10559344). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10559344

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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