The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 11, 2020

Filed:

Feb. 01, 2018
Applicant:

Qorvo Us, Inc., Greensboro, NC (US);

Inventors:

Christopher Truong Ngo, Queen Creek, AZ (US);

Praveen Varma Nadimpalli, Chandler, AZ (US);

Alexander Wayne Hietala, Phoenix, AZ (US);

Assignee:

Qorvo US, Inc., Greensboro, NC (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/42 (2006.01); G06F 1/18 (2006.01); G06F 1/26 (2006.01);
U.S. Cl.
CPC ...
G06F 13/423 (2013.01); G06F 1/182 (2013.01); G06F 1/26 (2013.01);
Abstract

The present disclosure relates to a bus interface system including a bus line, master integrated circuitry (IC), and slave IC. The master IC is coupled to the bus line and configured to transmit the data signal to the slave IC through the bus line. The slave IC is coupled to the bus line so as to receive the data signal from the master IC and includes a supply capacitor, which is configured to store power from the data signal and provide a supply voltage to the slave IC. When the bus line is in the low state, the supply capacitor is isolated from the bus line. When the bus line is in the high state, the supply capacitor is allowed to extract power from the data signal on the bus line.


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