The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 11, 2020
Filed:
Dec. 20, 2017
Applicant:
Qualcomm Incorporated, San Diego, CA (US);
Inventors:
Christopher Kong Yee Chun, Austin, TX (US);
Chris Rosolowski, Encinitas, CA (US);
Assignee:
Qualcomm Incorporated, San Diego, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/40 (2006.01); G06F 13/364 (2006.01); G06F 13/38 (2006.01); G06F 13/42 (2006.01); H04L 12/40 (2006.01); G06F 13/362 (2006.01); G06F 1/3209 (2019.01); G06F 13/16 (2006.01); G06F 1/3234 (2019.01); H04L 12/403 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4031 (2013.01); G06F 1/3209 (2013.01); G06F 1/3278 (2013.01); G06F 13/1605 (2013.01); G06F 13/362 (2013.01); G06F 13/364 (2013.01); G06F 13/385 (2013.01); G06F 13/4282 (2013.01); H04L 12/403 (2013.01); H04L 12/40013 (2013.01); G06F 2213/0016 (2013.01); G06F 2213/0042 (2013.01); H04L 12/40 (2013.01);
Abstract
An integrated circuit includes a processor to monitor a communication interface arbitration sequence on a system bus, determine, based on the monitored arbitration sequence, a master or slave identifier that is sending a transaction on the system bus, and process the transaction based on the determined master or slave identifier that is sending the transaction.