The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10558518 B1

PDF
Full Text
Expired
Date of Patent:
Feb. 11, 2020

Filed:

Nov. 13, 2017
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Prashant Jayaprakash Nair, Elmsford, NY (US);

Alper Buyuktosunoglu, White Plains, NY (US);

Pradip Bose, Yorktown Heights, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/10 (2006.01); G06F 11/07 (2006.01); G06F 3/06 (2006.01); G11C 16/34 (2006.01); G06F 1/324 (2019.01); G06F 1/3296 (2019.01);
U.S. Cl.
CPC ...
G06F 11/0793 (2013.01); G06F 3/0604 (2013.01); G06F 3/0634 (2013.01); G06F 3/0673 (2013.01); G06F 11/073 (2013.01); G06F 11/076 (2013.01); G06F 1/324 (2013.01); G06F 1/3296 (2013.01); G06F 11/1008 (2013.01); G06F 11/1048 (2013.01); G11C 16/349 (2013.01);
Abstract

A computer monitors a memory system during operation. The computer detects a first number of errors in the memory system. The computer determines that the first number of errors is below an error level threshold. The computer lowers a first group of one or more memory parameters of the memory system by a first amount. After the lowering of one or more memory parameters by the first amount, the computer detects a second number of errors in the memory system. The computer determines that the second number of errors is above the error level threshold. The computer raises a second group of one or more memory parameters of the memory system by a second amount.


Find Patent Forward Citations

Nair, Prashant. (2020). Dynamic adjustments within memory systems (U.S. Patent No. 10558518). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10558518

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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