The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 11, 2020
Filed:
Feb. 13, 2019
Boe Technology Group Co., Ltd., Beijing, CN;
Beijing Boe Display Technology Co., Ltd., Beijing, CN;
Jinhu Cao, Beijing, CN;
Minghui Ma, Beijing, CN;
Jiaxin Yu, Beijing, CN;
Fengwu Yu, Beijing, CN;
Bin Cao, Beijing, CN;
Namin Kwon, Beijing, CN;
Wei Li, Beijing, CN;
Zhi Li, Beijing, CN;
Xinlei Cao, Beijing, CN;
Enke Guo, Beijing, CN;
BOE Technology Group Co., Ltd., Beijing, CN;
BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., Beijing, CN;
Abstract
An array substrate motherboard includes a substrate including a plurality of gate lines, a plurality of gate line driving leads, a plurality of data lines, and a plurality of data line driving leads; a plurality of gate line testing leads; a plurality of data line testing leads and a plurality of data line driving leads; a plurality of gate line testing pads; a plurality of data line testing pads; and an insulating layer arranged between the data line testing leads and the data line driving leads in the trimming region. A respective one of the plurality of data line testing pads is connected with a respective one of the plurality of data line testing leads. A respective one of the plurality of data line driving leads is connected with one of the plurality of data line testing leads that penetrate through the insulating layer.