The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 04, 2020

Filed:

Apr. 10, 2018
Applicant:

Samsung Display Co., Ltd., Yongin-si, Gyeonggi-do, KR;

Inventors:

Kyunghoon Chung, Yongin-si, KR;

Hyunjoon Kim, Suwon-si, KR;

Kyung-Bae Kim, Seongnam-si, KR;

Assignee:

Samsung Display Co., Ltd., Yongin-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/32 (2016.01); G09G 3/3266 (2016.01);
U.S. Cl.
CPC ...
G09G 3/3266 (2013.01); G09G 2310/06 (2013.01); G09G 2310/08 (2013.01);
Abstract

A scan driver includes circuit stages for sequentially outputting scan signals, each one of the circuit stages including a signal generator for generating signals provided at a first node and a third node based on a carry signal and a second clock signal, the signal generator including a (2-1)-th transistor including a control electrode connected to the third node and a first electrode for receiving the second clock signal, and a (2-2)-th transistor including a control electrode for receiving a low driving voltage, a first electrode connected to a second electrode of the (2-1)-th transistor, and a second electrode connected to the first node, a first node controller for applying a boosting voltage to the first node based on a first clock signal, and a pull up/down circuit for pulling the scan signal up/down to a high/low voltage based on a signal applied to a second node.


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