The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 04, 2020

Filed:

Nov. 16, 2018
Applicant:

Verily Life Sciences Llc, South San Francisco, CA (US);

Inventors:

Stephen O'Driscoll, San Francisco, CA (US);

You Zou, Redwood City, CA (US);

Sean Korhummel, San Carlos, CA (US);

Peng Cong, Burlingame, CA (US);

Kannan Sankaragomathi, San Mateo, CA (US);

Alireza Dastgheib, Mountain View, CA (US);

Jiang Zhu, Cupertino, CA (US);

Assignee:

VERILY LIFE SCIENCES LLC, South San Francisco, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06K 7/10 (2006.01); A61B 5/00 (2006.01); G06K 19/07 (2006.01); G06K 19/077 (2006.01); H02M 3/07 (2006.01); A61B 5/145 (2006.01); A61B 5/1473 (2006.01);
U.S. Cl.
CPC ...
G06K 7/10316 (2013.01); A61B 5/0031 (2013.01); G06K 19/0709 (2013.01); G06K 19/07773 (2013.01); H02M 3/07 (2013.01); A61B 5/1473 (2013.01); A61B 5/14532 (2013.01); A61B 2560/0219 (2013.01); A61B 2562/028 (2013.01);
Abstract

Systems are provided for a wireless system-on-chip (SoC) with integrated antenna, power harvesting, and biosensors. An illustrative SoC can have a dimension of 200 μm×200 μm×100 μm to allow painless injection. Such small device size is enabled by: a 13 μm×20 μm 1 nA current reference, optical clock recovery, low voltage inverting dc-dc to enable use of higher quantum efficiency diodes, on-chip resonant antenna, and an array-scanning reader.


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