The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 04, 2020

Filed:

Jan. 11, 2019
Applicant:

Mentium Technologies Inc., Santa Barbara, CA (US);

Inventors:

Farnood Merrikh Bayat, Goleta, CA (US);

Mirko Prezioso, Goleta, CA (US);

Assignee:

MENTIUM TECHNOLOGIES INC., Santa Barbara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/16 (2006.01); G11C 16/04 (2006.01); G06N 3/04 (2006.01); G11C 16/10 (2006.01); G06N 3/08 (2006.01); G11C 16/26 (2006.01); G11C 7/10 (2006.01); G11C 11/54 (2006.01);
U.S. Cl.
CPC ...
G06F 17/16 (2013.01); G06N 3/04 (2013.01); G06N 3/08 (2013.01); G11C 7/1006 (2013.01); G11C 11/54 (2013.01); G11C 16/0425 (2013.01); G11C 16/0466 (2013.01); G11C 16/0483 (2013.01); G11C 16/10 (2013.01); G11C 16/26 (2013.01);
Abstract

Systems and methods for a vector-by-matrix multiplier (VMM) module having a three-dimensional memory matrix of nonvolatile memory devices each having a charge storage, an activation input, a signal input and an output signal in a range that is based on a stored charge and an input signal during assertion of the activation signal. The memory devices are arranged in two dimensional (XY) layers that are vertically disposed along (Z) columns. The activation inputs of each layer are connected to a same activation signal, the memory devices of rows in a first dimension (X) of each layer have signal inputs connected to different input signals and have signal outputs connected in series to a common output. The memory devices of rows in a second dimension (Y) of each layer have signal inputs connected to a set of the same inputs along the first dimension.


Find Patent Forward Citations

Bayat, Farnood. (2020). Vector-by-matrix multiplier modules based on non-volatile 2d and 3d memory arrays (U.S. Patent No. 10552510). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10552510

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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