The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 04, 2020

Filed:

Jun. 28, 2017
Applicants:

Boe Technology Group Co., Ltd., Beijing, CN;

Hefei Xinsheng Optoelectronics Technology Co., Ltd., Hefei, Anhui, CN;

Inventors:

Ke Cao, Beijing, CN;

Chengshao Yang, Beijing, CN;

Binbin Cao, Beijing, CN;

Ling Han, Beijing, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); G02F 1/1368 (2006.01); H01L 29/423 (2006.01); H01L 29/786 (2006.01); G02F 1/1339 (2006.01); G02F 1/1335 (2006.01); G02F 1/1362 (2006.01); G02F 1/1333 (2006.01);
U.S. Cl.
CPC ...
G02F 1/1368 (2013.01); G02F 1/13394 (2013.01); G02F 1/133345 (2013.01); G02F 1/133512 (2013.01); G02F 1/133516 (2013.01); G02F 1/136286 (2013.01); H01L 27/124 (2013.01); H01L 27/1218 (2013.01); H01L 27/1248 (2013.01); H01L 27/1262 (2013.01); H01L 29/42384 (2013.01); H01L 29/78696 (2013.01); G02F 1/136227 (2013.01); G02F 2001/13396 (2013.01); G02F 2001/13398 (2013.01); G02F 2001/13685 (2013.01); G02F 2001/136295 (2013.01);
Abstract

A display panel, a manufacturing method thereof and a display device are provided. The display panel includes an array substrate and an opposing substrate which are disposed opposite to each other; the array substrate includes a first base substrate and a source electrode, a drain electrode and an active layer which are disposed on the first base substrate, and a passivation layer disposed on the source electrode, the drain electrode and the active layer; the opposing substrate includes a second base substrate and a gate electrode disposed on the second base substrate; the active layer includes a source electrode region, a drain electrode region and a channel region between the source electrode region and the drain electrode region, the gate electrode is disposed opposite to and spaced apart from the passivation layer at a position where the channel region is located.


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