The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 04, 2020

Filed:

Oct. 28, 2015
Applicant:

Shenzhen China Star Optoelectronics Technology Co., Ltd., Shenzhen, CN;

Inventors:

Cheng Hung Chen, Shenzhen, CN;

Jiali Jiang, Shenzhen, CN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1343 (2006.01); G02F 1/1362 (2006.01); G02F 1/1368 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
G02F 1/134336 (2013.01); G02F 1/1368 (2013.01); H01L 27/124 (2013.01); G02F 1/136286 (2013.01); G02F 2001/136222 (2013.01); G02F 2201/121 (2013.01); G02F 2201/123 (2013.01);
Abstract

Disclosed are an array substrate and a liquid crystal display panel. The array substrate includes a plurality of gate lines and a plurality of data lines. The plurality of gate lines and the plurality of data lines are interleaved to form a plurality of pixel areas, and a pixel electrode is formed in each of the pixel areas. The pixel electrode is connected to a corresponding gate line and a corresponding data line via a thin film transistor. The array substrate further includes a common electrode, which is connected to a first pixel electrode and a second electrode via a thin film transistor. A signal in the first pixel electrode and a signal in the second pixel electrode have opposite polarities. The array substrate realizes automatic adjustment of a common electrode voltage, and corresponding regulators or machines are no longer needed. It is favorable to improvement of productivity and competitiveness of the array substrate and the liquid crystal display panel.


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