The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 28, 2020

Filed:

May. 29, 2019
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Albino Pidutti, Villach, AT;

Damiano Gadler, Klagenfurt, AT;

Ioannis Pachnis, Villach, AT;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 7/219 (2006.01);
U.S. Cl.
CPC ...
H02M 7/219 (2013.01);
Abstract

A rectifier device is described herein. In accordance with one embodiment, the rectifier device includes a semiconductor body doped with dopants of a first doping type and one or more well regions arranged in the semiconductor body and doped with dopants of a second doping type. Thereby, the one or more well regions and the surrounding semiconductor body form a pn-junction. The rectifier device further includes an anode terminal and a cathode terminal connected by a load current path of a first MOS transistor and a diode, which is parallel to the load current path. An alternating input voltage is applied between the anode terminal and the cathode terminal during operation of the rectifier device. The rectifier device includes a control circuit that is configured to switch on the first MOS transistor for an on-time period, during which the diode is forward biased, wherein the first MOS transistor and the diode are integrated in the semiconductor body and the control circuit is at least partly arranged in the one or more well regions. Further, the rectifier device includes a switching circuit that is configured to electrically connect a first well region of the one or more well regions with the anode terminal, as long as the alternating input voltage is above a threshold value, and, to pull the voltage of first well region towards the alternating input voltage, as long as the alternating input voltage is at or below the threshold value.


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