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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10546814 B1

PDFFull Text
Date of Patent:
Jan. 28, 2020

Filed:

Nov. 16, 2016

Three dimensional semiconductor memory device having peripheral circuit under cell structure

Applicant:

SK Hynix Inc., Gyeonggi-do, KR;

Inventors:

Jung-Mi Tak, Seoul, KR;

Sung-Lae Oh, Chungcheongbuk-do, KR;

Assignee:

SK hynix Inc., Gyeonggi-do, KR;

Attorney:

IP & T Group LLP

Primary Examiner:

Mohsen Ahmadi

Assistant Examiner:

Scott E Bauman

Int. Cl.
CPC ...
G11C 5/02 (2006.01); G11C 5/06 (2006.01); G11C 17/18 (2006.01); H01L 23/522 (2006.01); H01L 23/525 (2006.01); H01L 23/528 (2006.01); H01L 27/1157 (2017.01); H01L 27/11519 (2017.01); H01L 27/11524 (2017.01); H01L 27/11529 (2017.01); H01L 27/11556 (2017.01); H01L 27/11565 (2017.01); H01L 27/11573 (2017.01); H01L 27/11582 (2017.01);
U.S. Cl.
CPC ...
H01L 23/528 (2013.01); G11C 17/18 (2013.01); H01L 23/5226 (2013.01); H01L 23/5256 (2013.01); H01L 27/1157 (2013.01); H01L 27/11524 (2013.01); H01L 27/11529 (2013.01); H01L 27/11573 (2013.01); H01L 27/11519 (2013.01); H01L 27/11556 (2013.01); H01L 27/11565 (2013.01); H01L 27/11582 (2013.01);
Abstract

A semiconductor memory device with a three-dimensional (3D) structure may include: a cell region arranged over a substrate, including a cell structure; a peripheral circuit region arranged between the substrate and the cell region; an upper wiring structure arranged over the cell region; main channel films and dummy channel films formed through the cell structure. The dummy channel films are suitable for electrically coupling the upper wiring structure.

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Tak, Jung-Mi. (2020). Three dimensional semiconductor memory device having peripheral circuit under cell structure (U.S. Patent No. 10546814). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10546814

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