The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 28, 2020

Filed:

May. 08, 2018
Applicant:

Semiconductor Components Industries, Llc, Phoenix, AZ (US);

Inventors:

Erik Nino Tolentino, Seremban, MY;

Vernal Raja Manikam, Shah Alam, MY;

Azhar Aripin, Subang Jaya, MY;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/053 (2006.01); H01L 23/373 (2006.01); H01L 21/56 (2006.01); H01L 23/31 (2006.01); H01L 25/065 (2006.01); H01L 25/00 (2006.01); H01L 23/498 (2006.01); H01L 23/538 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3735 (2013.01); H01L 21/56 (2013.01); H01L 23/315 (2013.01); H01L 23/3121 (2013.01); H01L 25/0652 (2013.01); H01L 25/50 (2013.01); H01L 23/49861 (2013.01); H01L 23/5385 (2013.01); H01L 23/5389 (2013.01); H01L 2224/33 (2013.01);
Abstract

A power semiconductor package includes a first direct bonded copper (DBC) substrate having a plurality of connection traces on a first face of the first DBC substrate. A plurality of die are coupled to the connection traces, each die coupled to one of the connection traces at a first face of the die. A second DBC substrate includes connection traces on a first face of the second DBC substrate. A second face of each die is coupled to one of the connection traces of the first face of the second DBC substrate. A cavity between the first face of the first DBC substrate and the first face of the second DBC substrate is filled with an encapsulating compound. Terminal pins may be coupled to connection traces on the first face of the first DBC substrate. More than two DBC substrates may be stacked to form a stacked power semiconductor package.


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