The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 28, 2020

Filed:

Mar. 03, 2016
Applicant:

Toshiba Memory Corporation, Tokyo, JP;

Inventors:

Tatsuhiko Shirakawa, Yokkaichi Mie, JP;

Kenji Takahashi, Oita Oita, JP;

Eiji Takano, Oita Oita, JP;

Masaya Shima, Oita Oita, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/683 (2006.01);
U.S. Cl.
CPC ...
H01L 21/6835 (2013.01); H01L 2221/68318 (2013.01); H01L 2221/68327 (2013.01); H01L 2221/68381 (2013.01);
Abstract

According to one embodiment, a semiconductor manufacturing method for a stacked body that includes a semiconductor substrate, a supporting substrate containing silicon, and a joining layer arranged between the semiconductor substrate and the supporting substrate to joint the semiconductor substrate and the supporting substrate, in which a surface of the semiconductor substrate opposite to the joining layer is to be ground, includes irradiating the stacked body with electromagnetic wave having energy of 0.11 to 0.14 eV from a side of the supporting substrate, and separating the semiconductor substrate from the supporting substrate.


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