The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 28, 2020
Filed:
Aug. 17, 2015
Boe Technology Group Co., Ltd., Beijing, CN;
Hefei Boe Optoelectronics Technology Co., Ltd., Hefei, Anhui, CN;
Xianjie Shao, Beijing, CN;
Xiaohe Li, Beijing, CN;
BOE TECHNOLOGY GROUP CO., LTD., Beijing, CN;
HEFEI BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., Hefei, Anhui, CN;
Abstract
The present invention provides a shift register unit and its driving method, a gate drive circuit and a display device, which can at least partially alleviate the problem of noise interference caused by non-release of the coupling capacitance of the thin film transistor itself in the GOA circuit. The shift register unit comprises: a pull-up control module for transmitting voltage of a first voltage terminal to a pull-up control node under the control of a first signal input terminal; a reset module for pulling down the potential of said pull-up control node to a voltage of a second voltage terminal under the control of a second signal input terminal; an output module for transmitting a signal input through a first clock signal terminal to a signal output terminal under the control of said pull-up control node; a first control module for pulling down the potential of the signal output terminal to the voltage of the second voltage terminal under the control of a second clock signal terminal; a second control module for pulling up or down the potential of the pull-up control node to a voltage of the first signal input terminal under the control of the second clock signal terminal.