The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 28, 2020

Filed:

Sep. 28, 2018
Applicant:

Furukawa Electric Co., Ltd., Tokyo, JP;

Inventors:

Masanori Takahashi, Tokyo, JP;

Yasuyoshi Uchida, Tokyo, JP;

Shintaro Yamasaki, Tokyo, JP;

Junichi Hasegawa, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G02B 6/35 (2006.01); G02B 6/293 (2006.01);
U.S. Cl.
CPC ...
G02B 6/3588 (2013.01); G02B 6/29355 (2013.01); G02B 6/356 (2013.01);
Abstract

An optical waveguide circuit device includes: an optical waveguide circuit including a cladding layer formed on a substrate and made from silica-based glass, and an optical waveguide formed within the cladding layer and made from silica-based glass; heaters formed over the cladding layer and the optical waveguide and configured to heat the optical waveguide; wiring line electrode layers formed over the cladding layer, each of the wiring line electrode layers being coupled to a corresponding heater of the heaters and configured to allow electrical power to be supplied to the coupled heater; and an insulating layer covering the cladding layer, the heaters, and the wiring line electrode layers. The wiring line electrode layers adjacent to each other in a plan view are formed in different wiring layers. The wiring line electrode layers adjacent to each other in the same wiring layer are spaced by at least a predetermined distance.


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