The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 28, 2020

Filed:

Dec. 22, 2017
Applicant:

Pacesetter, Inc., Santa Clara, CA (US);

Inventors:

David Doudna, Sunnyvale, CA (US);

Dean Andersen, San Jose, CA (US);

Thomas Ng, Santa Clara, CA (US);

Assignee:

PACESETTER, INC., Sylmar, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
A61N 1/372 (2006.01); G06F 3/06 (2006.01); G06F 11/10 (2006.01); A61N 1/368 (2006.01); A61B 5/04 (2006.01); A61N 1/37 (2006.01);
U.S. Cl.
CPC ...
A61N 1/37254 (2017.08); G06F 3/0604 (2013.01); G06F 3/0619 (2013.01); G06F 3/0637 (2013.01); G06F 3/0673 (2013.01); G06F 11/1004 (2013.01); A61B 5/04011 (2013.01); A61N 1/3688 (2013.01); A61N 1/3704 (2013.01); A61N 1/37247 (2013.01);
Abstract

Circuits, devices and methods are provided to manage modifications to protected registers within an implantable medical device (IMD). The circuit comprises a bus controller that includes an address register, an unlock register and a protected register (PR) enable unit. The PR enable unit sets a protect enable signal to an access state based on content loaded into the unlock register. A peripheral block includes a protected register that retains content for operating the IMD. The peripheral block includes a register access input to receive the protected enable signal. A PR write control unit is provided to enable an attempted write of the content from a data interface to the protected register when the protected enable signal has an access state.


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