High electron mobility transistor with dual thickness barrier layer

Abstract

A method of forming a semiconductor device includes providing a heterojunction semiconductor body. The heterojunction semiconductor body includes a first type III-V semiconductor layer and a second type III-V semiconductor layer formed over the first type III-V semiconductor layer. The second type III-V semiconductor layer has a different bandgap as the first type III-V semiconductor layer such that a first two-dimensional charge carrier gas forms at an interface between the first and second type III-V semiconductor layers. The second type III-V semiconductor layer has a thicker section and a thinner section. A first input-output electrode is formed on the thicker section. A gate structure and a second input-output are formed on the thinner section. The gate structure is laterally spaced apart from a transition between the thicker and thinner sections of the second type III-V semiconductor layer.