The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 21, 2020
Filed:
Apr. 10, 2018
Western Digital Technologies, Inc., San Jose, CA (US);
Amir Hossein Gholamipour, Irvine, CA (US);
Chandan Mishra, Irvine, CA (US);
Daniel Helmick, Broomfield, CO (US);
WESTERN DIGITAL TECHNOLOGIES, INC., San Jose, CA (US);
Abstract
Apparatuses, systems, and methods are disclosed for mapping-based wear leveling for non-volatile memory. An apparatus may include one or more non-volatile memory elements, and a controller. A controller may maintain a logical-to-physical mapping for converting logical addresses to physical addresses. A logical-to-physical mapping may include a translation table that associates groups of logical addresses with groups of physical addresses, and one or more mathematical mappings. A mathematical mapping for a group of logical addresses may associate individual logical addresses within the group of logical addresses with individual physical addresses within a corresponding group of physical addresses. A controller may change at least one mathematical mapping. A controller may move data based on at least one changed mapping.